Senior Test Engineer – Coimbatore, India

Senior Test Engineer Coimbatore, India

Location: Coimbatore, Tamil Nadu, India

Work Mode: On-site

Experience: 3- 7 Years

Functional Area: Semiconductor Test Engineering / Product Engineering / ATE

Role Overview

We are looking for a Senior Test Engineer with hands-on experience in semiconductor ATE test development, characterization, debugging and production testing.

The role involves developing ATE test programs from scratch, integrating test functions and test flows, supporting first-silicon bring-up, and performing Wafer Sort (WS) and Final Test (FT) activities during NPI. Candidates should have practical experience on at least one of the following ATE platforms: Advantest V93K, Teradyne UltraFLEX or ETS364.

Key Responsibilities

• Develop ATE test programs from scratch for semiconductor devices.
• Develop, integrate and debug test functions and complete ATE test flows.
• Support first-silicon bring-up for wafer-level and packaged devices during the NPI phase.
• Plan and execute end-to-end engineering activities with Product Engineering, Test, Reliability and Foundry Technology teams.
• Perform Wafer Sort (WS) and Final Test (FT) development and production support.
• Analyze volume test data from FT and WS and define appropriate screening specifications.
• Develop and debug test patterns and test flows for semiconductor products.
• Support schematic development and debugging of test interface hardware.
• Perform characterization and debug of new silicon designs and process technologies.
• Execute testing and characterization of Digital, Analog, Mixed-Signal and Power Management devices.
• Support High Temperature Operating Life (HTOL), performance and power-related testing.
• Investigate test failures, silicon behavior and product reliability issues through structured characterization and debugging.

Required Qualifications

• Bachelor's or Master's degree in Electronics, Electrical, Semiconductor Engineering, VLSI or a related engineering discipline.
• 3- 7 years of relevant semiconductor test engineering experience.
• Hands-on experience with at least one ATE platform:
• Advantest V93K
• Teradyne UltraFLEX
• ETS364
• Experience developing and debugging semiconductor test programs and test flows.
• Practical experience with Wafer Sort (WS) and Final Test (FT).
• Experience testing Digital, Analog, Mixed-Signal and/or Power Management ICs.
• Programming experience in C, C++, VB or C#.
• Technical Skills

ATE Platforms

• Advantest V93K
• Teradyne UltraFLEX / UFlex
• ETS364

ATE Software / Test Environment

• SmarTest
• IG-XL
• Eagle Vision

Semiconductor Test

• ATE Test Program Development
• Test Flow Development
• First Silicon Bring-Up
• Wafer Sort / Wafer Probe
• Final Test
• NPI Test Engineering
• Silicon Characterization
• Product Reliability Testing
• Volume Test Data Analysis
• Device Screening

Device / Product Knowledge

• Digital IC Testing
• Analog IC Testing
• Mixed-Signal Testing
• Power Management IC Testing

Programming

• C
• C++
• VB
• C#

Test & DFT Exposure

• Scan Test
• ATPG
• Memory BIST
• Test Pattern Development and Debug

The original JD specifically calls for Digital, Analog, Power Management and Mixed-Signal validation at Wafer Sort and Final Test, together with C/C++/VB/C# and SmarTest/IG-XL/Eagle Vision exposure.

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