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MosChip®

Senior / Lead RTL Engineer-ASIC/SOC/IP-Hyderabad & Bangalore

MosChip®

Hyderabad, Telangana, India
Full-Time
Posted 14 days ago

Opens the application on in.linkedin.com

Job Description & Responsibilities

Company Description

MosChip® Technologies is a publicly traded company specializing in silicon and product engineering solutions, with a team of over 2500 engineers across Silicon Valley, USA, and multiple locations in India. The company delivers end-to-end silicon design, verification, systems, software, and device engineering, as well as multimedia, mobility, connectivity, AI/ML solution design, and test automation services. MosChip® also focuses on Digital IPs, Verification IPs, Mixed Signal IPs development, and turnkey ASIC services for global customers. The organization has shipped millions of connectivity ICs and has a strong record of first-time-right silicon across more than 200 SoC tape-outs, offering a highly technical and innovation-driven environment for engineering professionals.

Experience: 5-12 years

Locations: Bangalore & Hyderabad

Joining: Immediate joiners preferred

Minimum Qualifications

  • Bachelor's or Master's degree with relevant hands-on experience in large-scale, high-performance ASIC design and implementation.
  • Experience in implementation specification creation and RTL development using Verilog and SystemVerilog.
  • Proficiency in RTL design and verification tools, including VCS, SpyGlass, CDC analysis, and formal verification.
  • Strong system-level debugging skills, including software/hardware bring-up and silicon validation through First Customer Shipment (FCS).
  • Good understanding of gate-level design, logic synthesis, and RTL-to-gate implementation.
  • Programming and scripting experience in C, C++, and Perl.
  • Familiarity with hardware emulation platforms and tools such as EVE and Veloce.
  • Strong written and verbal communication, interpersonal, and leadership skills.

Preferred Experience

  • Experience in block-level design of large-scale, high-performance ASICs.
  • Ability to define and plan block-level design strategies based on system requirements.
  • Exposure to complex debugging, system integration, and end-to-end validation.
  • Hands-on experience across the implementation flow, including specification development, RTL design, lint, CDC, timing analysis, formal verification, and system testing.
  • Experience in flow automation using scripting, Makefiles, and related tools.
  • Ability to collaborate with senior engineers on architectural decisions and design strategies.
  • Strong analytical and problem-solving skills, with the ability to communicate technical issues and design improvements clearly.
  • Excellent written and verbal communication skills.

Required Skills

Machine LearningCommunicationLeadership

Job Details

Employment TypeFull-Time
Work ModeOn-Site
Experience5 – 12 years
Positions1

Posted by

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Posted on:

15 Oct 2026

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