Machine Learn Engineer 5

Job Description

Experience Range: 15+ years of deep expertise in edge AI, with a proven history of shaping company-wide or industry-level technical directions in efficient neural inference across multiple hardware platforms.

As a senior staff-level individual contributor and strategic technical authority, you will set the multi-year vision for Lattices edge AI capabilities, primarily through sensAI on Lattice FPGAs but extending to influence and provide solutions for broader edge ecosystems (including NXP processors/NPUs and other accelerators).

You will solve the most ambiguous, cross-organizational challenges in ultra-efficient edge inference, drive transformative advancements (next-gen hardware-aware co-design, revolutionary compression paradigms), mentor staff/senior engineers.

Key Responsibilities

Define and champion the 3 5+ year technical vision for edge inference model architectures, optimization paradigms, compiler/ML hardware co-design, and ecosystem strategy primarily for Lattice sensAI, with extensions to other platforms (e.g., NXP NPUs, Arm-based systems)

Lead high-impact, ambiguous initiatives spanning hardware, compiler, software, and product teams.

Architect and drive adoption of groundbreaking techniques: hardware-aware NAS, quantization, dynamic/sparse inference, automated co-design flows for multi-platform deployment

Serve as technical expert, aligning ML strategy with company business goals, hardware roadmaps (Lattice and partners), and long-term competitive positioning. Mentor staff and senior ML engineers, fostering a culture of technical excellence and innovation in cross-platform edge AI.

Identify and resolve the most complex, organization-spanning bottlenecks in edge inference performance/power/accuracy across Lattice FPGAs and other accelerators.

Own strategic evolution of the sensAI Model Zoo as a flagship industry resource (ecosystem partnerships, standardization, open benchmarks with support for NXP and similar platforms).

Guide creation of advanced RD prototypes, datasets, and frameworks that shape future sensAI generations and partner integrations.

Required Skills and Qualifications

10+ years of progressively responsible experience in edge AI, with demonstrated company-wide impact in efficient neural networks across diverse hardware

World-class mastery of DL frameworks, model optimization, and edge deployment ecosystems (including cross-platform tools like ONNX Runtime)

Pioneering expertise in extreme efficiency techniques and hardware/ML co-design for FPGAs and NPUs

Track record of full-stack leadership on complex edge AI systems (Lattice FPGAs, NXP NPUs/custom accelerators)

Exceptional ability to influence senior stakeholders, define strategy, and drive ambiguous initiatives

PhD in CS, EE, AI/ML or equivalent strongly preferred (with significant research/industry contributions)

Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying. Job Description

Experience Range: 15+ years of deep expertise in edge AI, with a proven history of shaping company-wide or industry-level technical directions in efficient neural inference across multiple hardware platforms.

As a senior staff-level individual contributor and strategic technical authority, you will set the multi-year vision for Lattices edge AI capabilities, primarily through sensAI on Lattice FPGAs but extending to influence and provide solutions for broader edge ecosystems (including NXP processors/NPUs and other accelerators).

You will solve the most ambiguous, cross-organizational challenges in ultra-efficient edge inference, drive transformative advancements (next-gen hardware-aware co-design, revolutionary compression paradigms), mentor staff/senior engineers.

Key Responsibilities

Define and champion the 3 5+ year technical vision for edge inference model architectures, optimization paradigms, compiler/ML hardware co-design, and ecosystem strategy primarily for Lattice sensAI, with extensions to other platforms (e.g., NXP NPUs, Arm-based systems)

Lead high-impact, ambiguous initiatives spanning hardware, compiler, software, and product teams.

Architect and drive adoption of groundbreaking techniques: hardware-aware NAS, quantization, dynamic/sparse inference, automated co-design flows for multi-platform deployment

Serve as technical expert, aligning ML strategy with company business goals, hardware roadmaps (Lattice and partners), and long-term competitive positioning. Mentor staff and senior ML engineers, fostering a culture of technical excellence and innovation in cross-platform edge AI.

Identify and resolve the most complex, organization-spanning bottlenecks in edge inference performance/power/accuracy across Lattice FPGAs and other accelerators.

Own strategic evolution of the sensAI Model Zoo as a flagship in